The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Dec. 17, 2012
Applicant:

Huawei Technologies Co., Ltd., Shenzhen, Guangdong, CN;

Inventors:

Dengben Wu, Shenzhen, CN;

Yu Zhang, Shenzhen, CN;

Baifeng Yu, Shenzhen, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); G06F 1/12 (2006.01); G06F 11/16 (2006.01); G06F 11/20 (2006.01);
U.S. Cl.
CPC ...
G06F 1/04 (2013.01); G06F 1/12 (2013.01); G06F 11/1604 (2013.01); G06F 11/20 (2013.01);
Abstract

The present invention relates to a computer system and a clock configuring method. The computer system comprises at least two nodes, wherein each of the at least two nodes includes a selecting module and a CPU, inputs to the selecting module of any node comprise a clock of the node and a clock output from other node, and an output terminal of the selecting module is connected to the CPU and an input terminal of the selecting module of other node; the computer system further comprises a clock controlling module, whose output terminal is connected to a control terminal of the selecting module to control the clocks of the at least two nodes to be the same clock. When clocks of plural nodes are abnormal, the computer system can still normally operate as long as there is a normal clock in the computer system.


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