The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Dec. 13, 2011
Applicants:

Daniele Mangano, Messina, IT;

Salvatore Pisasale, Catania, IT;

Ignazio Antonino Urzi', Voreppe, FR;

Inventors:

Daniele Mangano, Messina, IT;

Salvatore Pisasale, Catania, IT;

Ignazio Antonino Urzi', Voreppe, FR;

Assignees:

STMicroelectronics (Grenoble 2) SAS, Grenoble, FR;

STMicroelectronics S.R.L., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/40 (2006.01); G06F 13/16 (2006.01); G06F 13/364 (2006.01); G06F 13/42 (2006.01); G06F 1/12 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4059 (2013.01); G06F 13/1673 (2013.01); G06F 13/364 (2013.01); G06F 1/12 (2013.01); G06F 13/42 (2013.01); G06F 13/1689 (2013.01);
Abstract

An interface system for interfacing an asynchronous circuit with a synchronous circuit, wherein the synchronous circuit samples, in response to a clock signal, a first data signal when a first control signal indicates that the first data signal contains valid data, and wherein the asynchronous circuit generates a second data signal according to an asynchronous communication protocol. The system includes a FIFO memory, a control circuit for asynchronously writing the second data signal in the memory when the second data signal indicates the start of a communication, and synchronously reading the second data signal from the memory in response to a clock signal, and a conversion circuit for decoding, according to a asynchronous communication protocol, the second data signal read from the memory in a decoded data signal, wherein the decoded data signal corresponds to the first data signal.


Find Patent Forward Citations

Mangano, Daniele. (2015). Interface system, and corresponding integrated circuit and method (U.S. Patent No. 9026761). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9026761

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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