The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Oct. 19, 2005
Applicants:

Richard Gerard Hofmann, Cary, NC (US);

Thomas Andrew Sartorius, Raleigh, NC (US);

Thomas Philip Speier, Holly Springs, NC (US);

Jaya Prakash Subramaniam Ganasan, Youngsville, NC (US);

James Norris Dieffenderfer, Apex, NC (US);

James Edward Sullivan, Cary, NC (US);

Inventors:

Richard Gerard Hofmann, Cary, NC (US);

Thomas Andrew Sartorius, Raleigh, NC (US);

Thomas Philip Speier, Holly Springs, NC (US);

Jaya Prakash Subramaniam Ganasan, Youngsville, NC (US);

James Norris Dieffenderfer, Apex, NC (US);

James Edward Sullivan, Cary, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1621 (2013.01);
Abstract

The disclosure is directed to a weakly-ordered processing system and method for enforcing strongly-ordered memory access requests in a weakly-ordered processing system. The processing system includes a plurality of memory devices and a plurality of processors. Each of the processors are configured to generate memory access requests to one or more of the memory devices, with each of the memory access requests having an attribute that can be asserted to indicate a strongly-ordered request. The processing system further includes a bus interconnect configured to interface the processors to the memory devices, the bus interconnect being further configured to enforce ordering constraints on the memory access requests based on the attributes.


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