The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Dec. 13, 2013
Applicant:

Altera Corporation, San Jose, CA (US);

Inventors:

Sangeeta Raman, San Jose, CA (US);

Tim Tri Hoang, San Jose, CA (US);

Wilson Wong, San Francisco, CA (US);

Jie Shen, Fremont, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 7/30 (2006.01); H03H 7/40 (2006.01); H03K 5/159 (2006.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03949 (2013.01); H04L 25/03019 (2013.01);
Abstract

The present disclosure provides a floating-tap decision feedback equalization (DFE) circuit. In an exemplary implementation, the floating-tap DFE circuit may include a high-speed shift register, a deserializer and data selector, a bypass deserializer, a high-speed multiplexer and a tap generation circuit. In one aspect of the invention, the floating-tap DFE circuit may advantageously cover an entire tap range beyond a fixed tap range without holes over a range of data rates. Other embodiments, aspects and features are also disclosed.


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