The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2015
Filed:
Sep. 07, 2012
Applicant:
Se-hyun Kim, Gyeonggi-do, KR;
Inventor:
Se-Hyun Kim, Gyeonggi-do, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 11/56 (2006.01); G11C 16/04 (2006.01); G11C 16/14 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 11/5635 (2013.01); G11C 2211/5648 (2013.01); G11C 16/0483 (2013.01); G11C 16/14 (2013.01);
Abstract
A method for erasing a first sub-block of a plurality of sub-blocks included in a block of a non-volatile memory device, wherein the first sub-block includes at least one word line, includes applying an erase voltage to a substrate, applying a third voltage lower than the erase voltage to the word line of the first sub-block, applying a first voltage at least one word line adjacent to the word line of the first sub-block, and applying a second voltage that is the same as or similar to the erase voltage to the other word lines, where the first voltage has a level between the third voltage and the second voltage.