The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2015
Filed:
Nov. 20, 2013
International Business Machines Corporation, Armonk, NY (US);
Subramanian S. Iyer, Mount Kisco, NY (US);
Toshiaki Kirihata, Poughkeepsie, NY (US);
Chandrasekharan Kothandaraman, Hopewell Junction, NY (US);
Derek H. Leu, Hopewell Junction, NY (US);
Dan Moy, Bethel, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An embedded Multi-Time-Read-Only-Memory having a (MOSFET) cells' array having an initial threshold voltage (VT) including the MOSFETs arranged in a row and column matrix, having gates in each row coupled to a wordline (WL) running in a first direction and sources in each one of the columns coupled to a bitline (BL) running in a second direction; creating two dimensional meshed source line network running in the first and second directions, in a standby state, wherein BLs and MSLN are at a voltage (VDD), and the WLs are at ground; storing a data bit by trapping charges in a dielectric of a target MOSFET, VTof target MOSFET increasing to another voltage (VT) by a predetermined amount (ΔVT); reading a data bit by using the MOSFET threshold voltage having one of VTor VTto determine a trapped or de-trapped charge state, and resetting the data bit to a de-trapped state by de-trapping the charge.