The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Aug. 01, 2012
Applicants:

Katsuhiro Hoshina, Kumagawa, JP;

Tetsuya Iizuka, Saitama, JP;

Masato Nakamura, Fukaya, JP;

Kazuya Daishi, Fukaya, JP;

Inventors:

Katsuhiro Hoshina, Kumagawa, JP;

Tetsuya Iizuka, Saitama, JP;

Masato Nakamura, Fukaya, JP;

Kazuya Daishi, Fukaya, JP;

Assignee:

Japan Display Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/136 (2006.01); G02F 1/1343 (2006.01); G02F 1/1368 (2006.01); G02F 1/139 (2006.01);
U.S. Cl.
CPC ...
G02F 1/134363 (2013.01); G02F 1/1368 (2013.01); G02F 1/1395 (2013.01); G02F 2001/134381 (2013.01); G02F 2201/121 (2013.01);
Abstract

According to one embodiment, a liquid crystal display includes a first substrate including a gate wire, a source wire intersecting with the gate wire, a pixel electrode with a contact portion and a main pixel electrode extending from the contact portion, and a semiconductor layer arranged under the source wire and intersecting with the gate wire and bending under the source wire so as to extend to below the contact portion, a second substrate opposed to the array substrate, and a liquid crystal layer between the first and second substrate. The semiconductor layer is electrically connected to the source wire on one side of a position of the gate wire and to the contact portion on another side of the gate wire.


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