The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

Jun. 05, 2014
Applicant:

Asahi Kasei Microdevices Corporation, Tokyo, JP;

Inventors:

Fabrice Jovenin, Colombelles, FR;

Cedric Morand, Colombelles, FR;

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H03L 7/10 (2006.01); H03L 7/199 (2006.01);
U.S. Cl.
CPC ...
H03L 7/08 (2013.01); H03L 7/10 (2013.01); H03L 7/199 (2013.01);
Abstract

A phase-locked loop (PLL) device includes synchronization means suitable for synchronizing a frequency-converted signal produced by a frequency divider of the PLL device, with a reference signal supplied to the PLL device. A time duration of a frequency/phase lock acquisition step which is performed upon starting an operation of the PLL device can be reduced. In addition, when operating several PLL devices simultaneously, the synchronization units allow recovering target values for phase differences that exist between the respective frequency-converted signals of the PLL devices. To this end, synchronization is requested at a same time for all the PLL devices after they are all running in locked state.


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