The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2015
Filed:
Feb. 21, 2013
Applicant:
Wave Semiconductor, Inc., Sunnyvale, CA (US);
Inventor:
Gajendra Prasad Singh, Sunnyvale, CA (US);
Assignee:
Wave Semiconductor, Inc., Campbell, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/094 (2006.01);
U.S. Cl.
CPC ...
H03K 19/094 (2013.01); H03K 19/09425 (2013.01);
Abstract
Multi-threshold flash Null Convention Logic (NCL) includes one or more high threshold voltage transistors within a flash NCL gate to reduce power consumption due to current leakage by transistors of the NCL gate. High-threshold voltage transistors may be added and/or may be used in place of one or more lower voltage threshold transistors of the NCL gate. A high-Vt device is included in the pull-up path to reduce power when the flash NCL logic gate is in the null state.