The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2015

Filed:

May. 01, 2014
Applicant:

Sumitomo Electric Industries, Ltd., Osaka, JP;

Inventors:

Naoko Konishi, Yokohama, JP;

Hideki Yagi, Machida, JP;

Ryuji Masuyama, Kamakura, JP;

Yoshihiro Yoneda, Isehara, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 31/0232 (2014.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 31/02325 (2013.01); H01L 31/18 (2013.01);
Abstract

A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the first terrace having first to fourth terrace portions, the second terrace having fifth to eighth terrace portions, the waveguide mesa having first to fourth mesa portions; forming a second insulator mask including a first pattern on the first terrace portion, a second pattern on the fifth terrace portion, a third pattern on the third and fourth mesa portions, and a fourth pattern that integrally covers a region extending from the fourth terrace portion to the eighth terrace portion through the fourth mesa portion; and selectively growing a semiconductor layer by using the second insulator mask.


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