The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2015
Filed:
Mar. 12, 2013
Pmc-sierra Us, Inc., Sunnyvale, CA (US);
Janardan Prasad, Bangalore, IN;
PMC-Sierra US, Inc., Sunnyvale, CA (US);
Abstract
A power-saving method for a first-in-first-out (FIFO) buffer implemented in a memory. The memory is segmented into a plurality of logical segments. For each logical segment, for each power saving mode, a recovery time and recovery overhead to an operational mode, and a transition overhead for transitioning the logical segment into the power saving mode, are determined. During each clock cycle, a determination is made as to whether a net power saving will result by entering each logical segment into a power saving mode based on a minimum time before a read or write pointer will enter the logical segment as well as the recovery time, the recovery overhead, and the transition overhead. The logical segment is transitioned to the power saving mode only if a net power saving will result, and is returned to the operational mode when the minimum time is no longer greater than the recovery time.