The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2015
Filed:
Aug. 31, 2011
Prashanth Nimmala, Beaverton, OR (US);
Robert J. Greiner, Beaverton, OR (US);
Lily P. Looi, Portland, OR (US);
Rupin H. Vakharwala, Hillsboro, OR (US);
Marcus W. Song, Hillsboro, OR (US);
James A. Beavens, Portland, OR (US);
Aimee D. Wood, Hillsboro, OR (US);
Jeff V. Tran, Hillsboro, OR (US);
Prashanth Nimmala, Beaverton, OR (US);
Robert J. Greiner, Beaverton, OR (US);
Lily P. Looi, Portland, OR (US);
Rupin H. Vakharwala, Hillsboro, OR (US);
Marcus W. Song, Hillsboro, OR (US);
James A. Beavens, Portland, OR (US);
Aimee D. Wood, Hillsboro, OR (US);
Jeff V. Tran, Hillsboro, OR (US);
Other;
Abstract
In one embodiment, the present invention includes apparatus that is formed on a single semiconductor die having one or more cores, a memory controller, and a hub coupled to the memory controller. The hub includes multiple fabrics each to communicate with a peripheral controller via a target interface and a master interface according to a first protocol, and where the fabrics are serially coupled via a first plurality of target interfaces in an upstream direction and a second plurality of target interfaces in a downstream direction. Other embodiments are described and claimed.