The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Jun. 16, 2011
Applicant:

Katsutoshi Seki, Tokyo, JP;

Inventor:

Katsutoshi Seki, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/14 (2006.01); G06F 7/548 (2006.01); G06F 7/544 (2006.01);
U.S. Cl.
CPC ...
G06F 7/548 (2013.01); G06F 7/5446 (2013.01); G06F 17/141 (2013.01);
Abstract

Disclosed is a processor that is able to efficiently execute DFT operations without having part of a basic operational circuit idle even during non-DFT-operation processing. The processor () has an operational means (operation unit) () and a control means (control unit) (). The operation means () has a plurality of shift addition-and-subtraction means connected such that CORDIC (COordinate Rotation DIgital Computer) operations can be executed. The shift adding-and-subtracting means also execute shift addition-and-subtraction processing of butterfly operations that process shift addition-and-subtraction for one stage or more. The control means () instructs the operation means () to execute either CORDIC operations or butterfly operations, based on a plurality of data received from the outside.


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