Solid state switch gate firing with phase shift delay line

Abstract

A gate firing phase shift delay line technique is described for use in DC motor drive systems and is easily adaptable for controlling a plurality of electronically coupled power modules. A drive regulator is configured to produce a master gate firing timing signal for controlling the gate firing pattern of switching devices for a first power module. One or more delay blocks are configured to generate slave gate firing timing signals that are phase locked and identical but delayed in time with respect to the master signal. Each additional delay block is coupled to an additional power module having a set of switching devices controllable by the slave signals. The current output of each power module is summed via summing circuitry to deliver an output suitable to drive motors or other electrical loads in high power applications. The power modules can also be connected in series to combine (sum) the voltages for delivery to an electrical load. The present technique allows for DC motor drive systems to be tuned to a higher bandwidth level due to increased stability, resulting in increased drive performance and production speed.