The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Jun. 08, 2011
Applicants:

Jin-woo Park, Yongin, KR;

Seung-kyu Lee, Yongin, KR;

Chul-ho Kim, Yongin, KR;

Dong-hoon Lee, Yongin, KR;

Chi-woo Kim, Yongin, KR;

Inventors:

Jin-Woo Park, Yongin, KR;

Seung-Kyu Lee, Yongin, KR;

Chul-Ho Kim, Yongin, KR;

Dong-Hoon Lee, Yongin, KR;

Chi-Woo Kim, Yongin, KR;

Assignee:

Samsung Display Co., Ltd., Giheung-Gu, Yongin, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G11C 19/287 (2013.01);
Abstract

A shift register including a plurality of stages, each of them including a first node, a second node, and a third node being in a high-impedance state when the first node is in a high-impedance state. The shift register includes an input circuit unit inputting a driving voltage to the first node in response to an output signal of a previous stage, a driving circuit unit generating an output signal according to a voltage of the first node, and a holding unit holding the output signal at a level of a gate-off voltage according to a voltage of the second node in an inactive period of a current stage, in which the holding unit comprises a first diode which applies a clock signal to the second node.


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