The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Nov. 30, 2012
Applicants:

Anne Charrier, Marseilles, FR;

Hervé Dallaporta, Marseilles, FR;

Tuyen Nguyen Duc, Marseilles, FR;

Inventors:

Anne Charrier, Marseilles, FR;

Hervé Dallaporta, Marseilles, FR;

Tuyen Nguyen Duc, Marseilles, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/58 (2006.01); H01L 51/40 (2006.01); G01N 27/414 (2006.01); H01L 21/28 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
G01N 27/414 (2013.01); H01L 21/28185 (2013.01); H01L 29/51 (2013.01);
Abstract

A field effect transistor () including: a semiconducting substrate () having two areas doped with electric charge carriers forming a source area () and a drain area (), respectively; a dielectric layer positioned above the semiconducting substrate () between the source () and the drain () and forming the gate dielectric () of the field effect transistor (); a gate () consisting of a reference electrode () and of a conductive solution (), the solution () being in contact with the gate dielectric (); and the gate dielectric () consists of a layer of lipids () in direct contact with the semiconducting layer (). The invention also relates to a method for manufacturing such a field effect transistor () is disclosed.


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