The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2015

Filed:

Jan. 21, 2013
Applicant:

Fujitsu Semiconductor Limited, Yokohama, JP;

Inventors:

Hiroyuki Ogawa, Yokohama, JP;

Akihisa Yamaguchi, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/28 (2006.01); H01L 27/02 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28 (2013.01); H01L 27/10832 (2013.01); H01L 27/0207 (2013.01); H01L 27/10882 (2013.01); H01L 27/10891 (2013.01); H01L 27/10894 (2013.01);
Abstract

A semiconductor storage device includes: memory cells including a transistor and a capacitor; bit lines; word lines; and sense amplifiers including first and second sense amplifiers, wherein the memory cells includes: a first memory cell group sharing a first auxiliary word line; and a second memory cell group sharing a second auxiliary word line, wherein the word lines includes a first word line coupled to the first auxiliary word line and a second word line coupled to the second auxiliary word line, the first word line is coupled to the first auxiliary word line in a first word line contact region, the second word line is coupled to the second auxiliary word line in a second word line contact region, the bit lines includes first and second bit lines coupled to the first sense amplifier on both sides of the first word line contact region.


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