The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2015
Filed:
Jan. 24, 2013
Applicant:
Fujitsu Semiconductor Limited, Yokohama, Kanagawa, JP;
Inventors:
Makoto Kawano, Kuwana, JP;
Shigeki Yoshida, Ichinomiya, JP;
Assignee:
Fujitsu Semiconductor Limited, Yokohama, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 23/544 (2006.01); G03F 7/20 (2006.01); G03F 9/00 (2006.01); H01L 21/768 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); G03F 7/20 (2013.01); G03F 9/7073 (2013.01); H01L 2223/5442 (2013.01); H01L 2223/54426 (2013.01); H01L 2223/5446 (2013.01); H01L 21/28518 (2013.01); H01L 21/76802 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A method of manufacturing a semiconductor device includes: forming a recessed portion in a semiconductor substrate; forming an insulating film in the recessed portion; after forming the insulating film, forming a silicide layer on the semiconductor substrate in contact with the insulating film; and performing alignment between an electron beam exposure apparatus and the semiconductor substrate by using the insulating film and the silicide layer as an alignment mark.