The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2015
Filed:
Mar. 12, 2012
Applicant:
Stuart B. Berman, Newport Beach, CA (US);
Inventor:
Stuart B. Berman, Newport Beach, CA (US);
Assignee:
Emulex Corporation, Costa Mesa, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/08 (2006.01); H04L 12/66 (2006.01); H04L 12/28 (2006.01); H04L 12/703 (2013.01); H04B 10/03 (2013.01); H04L 12/931 (2013.01); H04L 12/947 (2013.01); H04L 12/935 (2013.01);
U.S. Cl.
CPC ...
H04L 45/28 (2013.01); H04L 49/205 (2013.01); H04L 49/25 (2013.01); H04L 49/30 (2013.01); H04L 49/351 (2013.01); H04L 49/357 (2013.01); H04L 49/604 (2013.01); H04B 10/03 (2013.01);
Abstract
A system and method for routing data is provided. The system includes a one or more ports, one or more bypass circuits, a data router, and a logic circuit. The one or more bypass circuits are connected to and corresponding in number to the one or more ports. The data router is connected to the one or more bypass circuits. The data router is operable to: monitor for data, decode a priority according to the data, and move data through the one or more bypass circuits according to the priority. The logic circuit is connected to the data router for interfacing to a system bus of a host computer.