The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2015

Filed:

Dec. 31, 2012
Applicant:

Silicon Laboratories, Inc., Austin, TX (US);

Inventors:

David Welland, Austin, TX (US);

Donald Kerth, Austin, TX (US);

Caiyi Wang, Austin, TX (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/00 (2006.01); H05K 9/00 (2006.01); H03L 7/18 (2006.01); H05K 1/02 (2006.01); H05K 3/10 (2006.01);
U.S. Cl.
CPC ...
H05K 9/00 (2013.01); H03L 7/18 (2013.01); H05K 1/0216 (2013.01); H05K 3/10 (2013.01);
Abstract

A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.


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