The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2015
Filed:
Sep. 09, 2010
Bill K. Kwan, Austin, TX (US);
Atchyuth K. Gorti, Austin, TX (US);
Amit Raj Pandey, Austin, TX (US);
Venkat K Kuchipudi, Austin, TX (US);
Aditya Jagirdar, Austin, TX (US);
Bill K. Kwan, Austin, TX (US);
Atchyuth K. Gorti, Austin, TX (US);
Amit Raj Pandey, Austin, TX (US);
Venkat K Kuchipudi, Austin, TX (US);
Aditya Jagirdar, Austin, TX (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
Scan-based reset utilizes already existing design-for-test scan chains to reset control and logic circuitry upon reset conditions, such as power-up reset. Such utilization eliminates the need for expensive, high fan-out reset trees and per scan cell reset control logic, thus reducing chip area and power consumption. Additional power savings is achieved by controlling clock frequency during reset conditions. Limiting scan cell chain length and providing multiple chains reduces reset latency.