Processor, control method of processor, and computer readable storage medium storing processing program for division operation

Abstract

A processor for dividing by calculating repeatedly an n-bit width partial quotient includes, a dividend zero count value counter that counts a dividend zero count value, a divisor zero count value counter that counts a divisor zero count value, a correction value calculator that calculates a correction value to a loop count value, a correction loop count value calculator that calculates a correction loop count value, a dividend shift unit that shifts leftward an absolute value of the dividend by the dividend zero count value and shifts rightward the leftward-shifted absolute value of the dividend by the correction value, a divisor shift unit that shifts leftward an absolute value of the divisor by the divisor zero count value, and a division loop operation unit that divides based on an output value from the dividend shift unit, an output value from the divisor shift unit, and the correction loop count value.