The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2015

Filed:

May. 01, 2012
Applicants:

Xiaojian Zhao, Shanghai, CN;

Rui Wu, Shanghai, CN;

Xin HU, Shanghai, CN;

Inventors:

Xiaojian Zhao, Shanghai, CN;

Rui Wu, Shanghai, CN;

Xin Hu, Shanghai, CN;

Assignee:

General Electric Company, Schenectady, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/335 (2006.01); H02M 1/088 (2006.01); H03K 17/691 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33592 (2013.01); Y10T 29/49117 (2015.01); H02M 1/088 (2013.01); H03K 17/691 (2013.01); Y02B 70/1475 (2013.01);
Abstract

A synchronous rectifier includes a primary rectifier circuit and a secondary rectifier circuit. The primary rectifier circuit is configured to produce first and second half-rectified signals from respective first and second primary voltage outputs of a first transformer winding. The secondary rectifier circuit is configured to rectify a voltage output of a second transformer winding in response to first and second transistor gate inputs. A first buffer driver is configured to receive the first half-rectified signal and to provide a first buffered control signal to the first transistor gate input. A second buffer driver is configured to receive the second half-rectified signal and to provide a second buffered control signal to the first transistor gate input.


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