The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2015

Filed:

Jan. 14, 2014
Applicant:

Marvell World Trade Ltd., St. Michael, BB;

Inventors:

Sehat Sutardja, Los Altos Hills, CA (US);

Poh Boon Leong, Singapore, SG;

Ping Song, Singapore, SG;

Nuntha Kumar Krishnasamy Maniam, Singapore, SG;

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/21 (2006.01); H03F 1/22 (2006.01); H03F 3/193 (2006.01); H03F 3/24 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03F 3/211 (2013.01); H03F 1/223 (2013.01); H03F 3/193 (2013.01); H03F 3/245 (2013.01); H03F 3/45179 (2013.01); H03F 3/45188 (2013.01); H03F 2200/408 (2013.01); H03F 2200/534 (2013.01); H03F 2200/537 (2013.01); H03F 2200/541 (2013.01); H03F 2203/45544 (2013.01); H03F 2203/45562 (2013.01); H03F 2203/45566 (2013.01); H03F 2203/45621 (2013.01); H03F 2203/45644 (2013.01); H03F 2203/45731 (2013.01);
Abstract

A power amplifier configured to boost an AC signal. The power amplifier includes a first transistor, a second transistor, a first inductor connected between the first transistor and a voltage source, and a second inductor connected between the second transistor and ground. A first phase conditioner arranged at an input of the first transistor is configured to condition a phase of the AC signal such that the AC signal as received by the first transistor is out of phase with respect to the AC signal as received by the first inductor. A second phase conditioner arranged at an input of the second transistor is configured to condition a phase of the AC signal such that the AC signal as received by the second transistor is out of phase with respect to the AC signal as received by the second inductor.


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