The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2015

Filed:

Dec. 08, 2014
Applicant:

Iq-analog Corporation, San Diego, CA (US);

Inventors:

Mikko Waltari, Escondido, CA (US);

Michael Kappes, San Diego, CA (US);

William Huff, San Diego, CA (US);

Assignee:

IQ-Analog Corporation, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/091 (2006.01); H03L 7/093 (2006.01); H03L 7/18 (2006.01); H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
H03L 7/091 (2013.01); H03L 7/093 (2013.01); H03L 7/1806 (2013.01); H03M 1/0626 (2013.01);
Abstract

A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal, derives a system clock signal having a second frequency, greater than the first frequency. A PLL using a voltage controlled oscillator (VCO) is one example of a frequency multiplier. The method samples the amplitude of the analog reference signal using the system clock signal and converts the sampled analog reference signal into a digitized reference signal. In response to comparing the digitized reference signal to an ideal digitized reference signal, the phase error correction for the system clock signal is derived. The phase error correction at a first instance of time can be applied to the digitized data signal, previously converted from an analog data signal sampled at a first instance of time with the system clock signal.


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