Non-volatile memory cell, non-volatile memory cell array, and method of manufacturing the same

Abstract

A stacking structure in which a stacked body () including a first conductive layer (), a semiconductor layer (), and a second conductive layer () and an interlayer insulating film () are alternately stacked in parallel to a substrate, a plurality of columnar electrodes () arranged so as to penetrated through the stacking structure in a stacking direction, a variable resistance layer () which is disposed between the columnar electrode () and the first conductive layer () and which has a resistance value that reversibly changes according to an application of an electric signal are included. The variable resistance layer () is formed by oxidizing part of the first conductive layer (). The variable resistance layer () and an insulating film for electrically separating the semiconductor layer () and the second conductive layer () from the columnar electrode () are simultaneously formed in a single oxidation process.