The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2015
Filed:
Apr. 03, 2012
Khaldoon S. Abugharbieh, Happy Valley, OR (US);
Daniel J. Ferris, Iii, Lakeville, MN (US);
Loren Jones, Aromas, CA (US);
Austin H. Lesea, Los Gatos, CA (US);
Khaldoon S. Abugharbieh, Happy Valley, OR (US);
Daniel J. Ferris, III, Lakeville, MN (US);
Loren Jones, Aromas, CA (US);
Austin H. Lesea, Los Gatos, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
An embodiment for skew compensation for a stacked die is disclosed. For an embodiment of an apparatus, an interposer has a first and a second integrated circuit die coupled to the interposer. The first integrated circuit die includes an information generator, a signal delay compensator, and an input/output block. The information generator is configured to determine: a first delay value for a first path of the interposer between the first integrated circuit die and the second integrated circuit die; a second delay value for a second path of the interposer between the first integrated circuit die and the second integrated circuit die; and a difference between the first delay value and the second delay value. The signal delay compensator is coupled to receive the difference and configured to adjust a parameter of the first integrated circuit die to reduce the difference.