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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9003160 B1

PDFFull Text
Date of Patent:
Apr. 07, 2015

Filed:

Aug. 03, 2012

Active buffered memory

Applicants:

Bruce M. Fleischer, Bedford Hills, NY (US);

Thomas W. Fox, Hopewell Junction, NY (US);

Hans M. Jacobson, White Plains, NY (US);

James A. Kahle, Austin, TX (US);

Jaime H. Moreno, Dobbs Ferry, NY (US);

Ravi Nair, Briarcliff Manor, NY (US);

Inventors:

Bruce M. Fleischer, Bedford Hills, NY (US);

Thomas W. Fox, Hopewell Junction, NY (US);

Hans M. Jacobson, White Plains, NY (US);

James A. Kahle, Austin, TX (US);

Jaime H. Moreno, Dobbs Ferry, NY (US);

Ravi Nair, Briarcliff Manor, NY (US);

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorney:

Cantor Colburn LLP

Primary Examiner:

Jasmine Song

Int. Cl.
CPC ...
G06F 12/10 (2006.01); G06F 9/445 (2006.01);
U.S. Cl.
CPC ...
G06F 9/44578 (2013.01); G06F 12/10 (2013.01); Y02B 60/1225 (2013.01);
Abstract

According to one embodiment of the present invention, a method for operating a memory device that includes memory and a processing element includes receiving, in the processing element, a command from a requestor, loading, in the processing element, a program based on the command, the program comprising a load instruction loaded from a first memory location in the memory, and performing, by the processing element, the program, the performing including loading data in the processing element from a second memory location in the memory. The method also includes generating, by the processing element, a virtual address of the second memory location based on the load instruction and translating, by the processing element, the virtual address into a real address.

Find Patent Forward Citations

Fleischer, Bruce. (2015). Active buffered memory (U.S. Patent No. 9003160). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9003160

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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