The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Aug. 11, 2010
Applicants:

Sebastian Brunner, Graz, AT;

Gerhard Fuchs, Steinerkirchen, AT;

Annette Fischer, Lannach, AT;

Manfred Fischer, Lannach, AT;

Christian Faistauer, Frauental, AT;

Guenter Pudmich, Koeflach, AT;

Edmund Payr, Graz, AT;

Stefan Leopold Hatzl, Graz, AT;

Inventors:

Sebastian Brunner, Graz, AT;

Gerhard Fuchs, Steinerkirchen, AT;

Annette Fischer, Lannach, AT;

Manfred Fischer, Lannach, AT;

Christian Faistauer, Frauental, AT;

Guenter Pudmich, Koeflach, AT;

Edmund Payr, Graz, AT;

Stefan Leopold Hatzl, Graz, AT;

Assignee:

Epcos AG, Munich, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/00 (2006.01); H01L 21/48 (2006.01); H01L 23/15 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 21/4846 (2013.01); H01L 23/15 (2013.01); H01L 23/49894 (2013.01); H01L 2924/09701 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/1461 (2013.01);
Abstract

A method for patterning a layer stack with at least one ceramic layer includes providing the ceramic layer, which has at least one plated-through hole. An electrically conductive layer is applied above the ceramic layer, such that the electrically conductive layer is electrically coupled to the at least one plated-through hole. A further layer is deposited onto the electrically conductive layer in the region of the at least one plated-through hole, wherein the further layer includes nickel. The electrically conductive layer is removed outside the region of the at least one plated-through hole. A carrier device patterned in this way can be electrically and mechanically coupled to an electronic component.


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