The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Mar. 09, 2012
Applicants:

David A. Sobel, Los Altos, CA (US);

Sumant Ranganathan, Saratoga, CA (US);

Tianhao LI, Tustin, CA (US);

John S. Walley, Ladera Ranch, CA (US);

Glen Weaver, San Jose, CA (US);

Kerrynn Jacques DE Roche, San Jose, CA (US);

Pi Sheng Chang, San Jose, CA (US);

Inventors:

David A. Sobel, Los Altos, CA (US);

Sumant Ranganathan, Saratoga, CA (US);

Tianhao Li, Tustin, CA (US);

John S. Walley, Ladera Ranch, CA (US);

Glen Weaver, San Jose, CA (US);

Kerrynn Jacques de Roche, San Jose, CA (US);

Pi Sheng Chang, San Jose, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/044 (2006.01); G06F 3/041 (2006.01);
U.S. Cl.
CPC ...
G06F 3/044 (2013.01); G06F 3/0416 (2013.01);
Abstract

Asymmetric scanning logic implements asymmetric panel scanning by scanning some rows on a touch panel more frequently than other rows. Note that although an entire row at a time may be driven, if only particular pixels in the row are of interest (e.g., included in any region of interest for focused asymmetric scanning), then circuitry may power down the receivers for the columns in which the pixels exist to save power. The asymmetric scanning logic facilitates focused attention to specific areas of interest on the touch panel, to compensate, for example, for high noise or low signal strength in those areas of interest.


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