The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2015

Filed:

Nov. 14, 2011
Applicant:

Hiroshi Shirouzu, Shiga, JP;

Inventor:

Hiroshi Shirouzu, Shiga, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2014.01); G09G 3/00 (2006.01); G02F 1/1362 (2006.01); H01L 27/02 (2006.01); G02F 1/1345 (2006.01); G02F 1/13 (2006.01);
U.S. Cl.
CPC ...
G09G 3/006 (2013.01); G02F 1/136204 (2013.01); H01L 27/0296 (2013.01); G02F 1/1345 (2013.01); G02F 1/13452 (2013.01); G09G 2330/04 (2013.01); G02F 1/1309 (2013.01); G02F 2203/69 (2013.01);
Abstract

An active matrix substrate including: gate lines; source lines arranged in a direction orthogonal to each of the gate lines; a gate short-circuit line to short-circuit the gate lines; a source short-circuit line to short-circuit the source lines; gate line thin film transistors each having a drain electrode being connected to the corresponding one of the gate lines, and a source electrode being connected to the gate short-circuit line; and source line thin film transistors each having a drain electrode being connected to the corresponding one of the source lines, and a source electrode being connected to the source short-circuit line, in which the gate line thin film transistors and the source line thin film transistors are of depletion-mode, and the gate electrode of each of the source line thin film transistors is connected to the gate short-circuit line.


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