The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2015
Filed:
Aug. 06, 2013
Applicant:
Faquir Chand Jain, Storrs, CT (US);
Inventors:
Pawan Gogna, Clinton, MA (US);
Faquir Chand Jain, Storrs, CT (US);
John Chandy, Storrs, CT (US);
Evan Heller, Glastonbury, CT (US);
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 29/78 (2006.01); H01L 27/11 (2006.01); H01L 27/108 (2006.01); H01L 29/10 (2006.01); H01L 29/15 (2006.01); H01L 29/205 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1108 (2013.01); H01L 27/108 (2013.01); H01L 29/1033 (2013.01); H01L 29/151 (2013.01); H01L 29/205 (2013.01);
Abstract
Multi-source/drain Spatial Wavefunction Switched (SWS) field-effect transistors (FETs) are configured to serve as 1-bit and 2-bit static random access memory (SRAM) and dynamic random access memory (DRAM) cells. The SWS-FET transport channel comprises of multiple asymmetric coupled wells which are contacted via more than one sources and drains.