The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 2015
Filed:
Apr. 06, 2012
Shirish Gadre, Fremont, CA (US);
Charles Mccarver, Madison, AL (US);
Anjana Rajendran, San Jose, CA (US);
Omkar Paranjape, Austin, TX (US);
Steven James Heinrich, Madison, AL (US);
Shirish Gadre, Fremont, CA (US);
Charles McCarver, Madison, AL (US);
Anjana Rajendran, San Jose, CA (US);
Omkar Paranjape, Austin, TX (US);
Steven James Heinrich, Madison, AL (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
One embodiment sets forth a technique for N-way memory barrier operation coalescing. When a first memory barrier is received for a first thread group execution of subsequent memory operations for the first thread group are suspended until the first memory barrier is executed. Subsequent memory barriers for different thread groups may be coalesced with the first memory barrier to produce a coalesced memory barrier that represents memory barrier operations for multiple thread groups. When the coalesced memory barrier is being processed, execution of subsequent memory operations for the different thread groups is also suspended. However, memory operations for other thread groups that are not affected by the coalesced memory barrier may be executed.