The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2015

Filed:

Sep. 28, 2012
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Santiago G. Asuncion, San Ramon, CA (US);

Mustansir Fanaswalla, Los Gatos, CA (US);

Vaibhav Kamdar, Campbell, CA (US);

Brandon L. Fernandes, Santa Clara, CA (US);

Jayesh Patil, Sunnyvale, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 3/46 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of analyzing a phase of a clock signal for receiving data is described. The method comprises identifying an end of an eye pattern associated with received data; testing points along a contour of the eye pattern to establish a margin for an opening of the eye pattern; and determining whether a phase of the clock signal is acceptable for receiving the received data. A circuit for analyzing a phase of a clock signal for receiving data is also described.


Find Patent Forward Citations

Asuncion, Santiago. (2015). Methods of and circuits for analyzing a phase of a clock signal for receiving data (U.S. Patent No. 8995514). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8995514

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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