The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 2015
Filed:
Feb. 12, 2013
Bae Systems Information and Electronic Systems Integration Inc., Nashua, NH (US);
Scott C. Willis, Fairfax Station, VA (US);
William C. Singleton, Manassas, VA (US);
Russell Buchanan, Arlington, VA (US);
BAE Systems Information and Electronic Systems Integration Inc., Nashua, NH (US);
Abstract
A method for dealing with high inrush current when voltage is applied to mixed voltage logic integrated circuits is disclosed. A depletion N-Channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) or junction Field Effect Transistor (JFET) is added to a linear voltage regulator in mixed voltage logic integrated circuits. The Field Effect Transistor (FET) is utilized to allow the core voltage to come up with Input/Output voltage prior to turn-on of linear voltage regulator. Turn-on state of FET allows the core voltage to rise with Input/Output voltage until the FET threshold is reached across the gate. When threshold is reached, the FET turns off to allow linear voltage regulator turn on and take over supply power.