The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2015
Filed:
Jun. 11, 2013
Applicant:
Wistron Corporation, New Taipei, TW;
Inventor:
Yen-Chia Huang, New Taipei, TW;
Assignee:
Wistron Corporation, New Taipei, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5068 (2013.01); G06F 2217/74 (2013.01);
Abstract
A circuit layout adjusting method is provided. A data file is generated according to a circuit board engineering drawing. The dada file includes at least one parameter of the circuit board engineering drawing. The data file is imported to a circuit layout drawing. At least one corresponding parameter of the circuit layout drawing are adjusted according to the data file.
Huang, Yen-Chia. (2015). Circuit layout adjusting method (U.S. Patent No. 8990753). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8990753
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile