The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2015
Filed:
Nov. 17, 2010
Craig D. Eaton, Austin, TX (US);
Ganesh Venkataramanan, Sunnyvale, CA (US);
Srikanth Arekapudi, Sunnyvale, CA (US);
Craig D. Eaton, Austin, TX (US);
Ganesh Venkataramanan, Sunnyvale, CA (US);
Srikanth Arekapudi, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
Methods, systems, and apparatuses are presented that remove BIST intrusion logic from critical timing paths of a microcircuit design without significant impact on testing. In one embodiment, BIST data is multiplexed with scan test data and serially clocked in through scan test cells for BIST testing. In another embodiment, BIST data is injected into the feedback path of one or more data latches. In a third embodiment, BIST data is injected into the result data path of a multi-cycle ALU within an execution unit. In each embodiment, BIST circuitry is eliminated from critical timing paths.