The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2015

Filed:

Jul. 31, 2012
Applicants:

Vladimir Y. Kolesnikov, Jersey City, NJ (US);

Ranjit Kumaresan, College Park, MD (US);

Inventors:

Vladimir Y. Kolesnikov, Jersey City, NJ (US);

Ranjit Kumaresan, College Park, MD (US);

Assignee:

Alcatel Lucent, Boulogne-Billiancourt, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/00 (2006.01); H04L 9/32 (2006.01); H04L 9/08 (2006.01);
U.S. Cl.
CPC ...
H04L 9/085 (2013.01); H04L 9/0861 (2013.01); H04L 9/0838 (2013.01); H04L 2209/46 (2013.01); H04L 2209/50 (2013.01);
Abstract

Methods and apparatus are provided for secure function evaluation for a covert client and a semi-honest server using string selection oblivious transfer. An information-theoretic version of a garbled circuit C is sliced into a sequence of shallow circuits C, . . . C, that are evaluated. Consider any wire wof C that is an output wire of C, and is an input wire of C. When a slice Cis evaluated, C's 1-bit wire key for wis computed by the evaluator, and then used, via string selection oblivious transfer (SOT), to obtain the wire key for the corresponding input wire of C. This process repeats until C's output wire keys are computed by the evaluator. The 1-bit wire keys of the output wires of the slice are randomly assigned to wire values.


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