The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2015

Filed:

Mar. 15, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Sujiang Rong, San Diego, CA (US);

Li Liu, San Diego, CA (US);

Yiwu Tang, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 5/12 (2006.01); H03B 5/02 (2006.01);
U.S. Cl.
CPC ...
H03B 5/1228 (2013.01); H03B 5/02 (2013.01); H03B 5/1296 (2013.01); H03B 5/1215 (2013.01); H03B 2200/0082 (2013.01); H03B 2200/009 (2013.01);
Abstract

A method, an apparatus, and a computer program product are provided. The apparatus provides a VCO signal. The apparatus is a VCO. The apparatus includes a first transconductance circuit. The apparatus further includes a second transconductance circuit coupled with the first transconductance circuit. The second transconductance circuit has a first configuration/mode (e.g., CMOS configuration/mode) and a second configuration/mode (e.g., NMOS configuration/mode or PMOS configuration/mode). The second transconductance circuit is configured to couple an input of the second transconductance circuit to the first transconductance circuit in the first configuration/mode. The second transconductance circuit is configured to isolate the input of the second transconductance circuit from the first transconductance circuit in the second configuration/mode. The second transconductance circuit may include a first transistor and a second transistor, and the input may be a gate of each of the first transistor and the second transistor.


Find Patent Forward Citations

Loading…