The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2015

Filed:

Nov. 27, 2012
Applicant:

Kenji Sasaoka, Tokyo, JP;

Inventor:

Kenji Sasaoka, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/485 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01); H05K 1/18 (2006.01); H01L 29/66 (2006.01); H01L 23/00 (2006.01); H05K 3/34 (2006.01); H05K 3/46 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49861 (2013.01); H01L 23/5389 (2013.01); H05K 1/186 (2013.01); H05K 1/187 (2013.01); H01L 29/66007 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81192 (2013.01); H01L 2224/81385 (2013.01); H01L 2224/81447 (2013.01); H01L 2224/83192 (2013.01); H01L 2924/01057 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/19041 (2013.01); H05K 3/3436 (2013.01); H05K 3/3442 (2013.01); H05K 3/4602 (2013.01); H05K 3/4614 (2013.01); H05K 2201/10636 (2013.01); H05K 2201/10674 (2013.01); H05K 2203/061 (2013.01); H05K 2203/063 (2013.01); H01L 2224/131 (2013.01); H01L 2924/01087 (2013.01); H01L 2224/32225 (2013.01);
Abstract

Disclosed is a component built-in wiring board including: a first insulating layer on a second one having laminated at least two insulating layers; a semiconductor chip buried in the second insulating layer, having a terminal pad; a wiring pattern between the first and the second insulating layers, including a mounting land and having a roughened surface facing the second insulating layer; a conductive bump between the terminal pad and the mounting land; a resin between the semiconductor chip and both the first insulating layer and the wiring pattern; a second wiring pattern between the at least two insulating layers; and an interlayer connector between surfaces of the wiring pattern and the second wiring pattern to penetrate partly through the second insulating layer in a layered direction, made of a conductive composition, and having a shape with an axis along the layered direction and a diameter varying in an axial direction.


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