The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2015
Filed:
Sep. 13, 2012
Applicant:
Seung Jee Kim, Seongnam-si, KR;
Inventor:
Seung Jee Kim, Seongnam-si, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3128 (2013.01); H01L 21/568 (2013.01); H01L 23/295 (2013.01); H01L 24/13 (2013.01); H01L 24/19 (2013.01); H01L 2224/02371 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/131 (2013.01); H01L 2224/19 (2013.01); H01L 2224/20 (2013.01); H01L 2224/73267 (2013.01); H01L 2924/014 (2013.01);
Abstract
The embedded package includes a semiconductor chip having contact portions disposed on a top surface thereof, a first dielectric layer substantially surrounding sidewalls of the semiconductor chip and including first fillers dispersed therein, a second dielectric layer substantially covering the top surface of the semiconductor chip and including second fillers dispersed therein, and first external interconnection portions disposed on the second dielectric layer and electrically connected to the contact portions, wherein an average size of the first fillers is different from that of the second fillers.