The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2015

Filed:

Mar. 21, 2012
Applicants:

Soodoo Chae, Yongin-si, KR;

Kihyun Hwang, Seongnam-si, KR;

Hanmei Choi, Seoul, KR;

Seunghyun Lim, Yongin-si, KR;

Inventors:

Soodoo Chae, Yongin-si, KR;

Kihyun Hwang, Seongnam-si, KR;

Hanmei Choi, Seoul, KR;

SeungHyun Lim, Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/115 (2006.01); G11C 5/02 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/1157 (2013.01); G11C 5/02 (2013.01); G11C 16/0483 (2013.01);
Abstract

Nonvolatile memory devices include a vertical stack of nonvolatile memory cells. The vertical stack of nonvolatile memory cells includes a first nonvolatile memory cell having a first gate pattern therein, which is separated from a vertical active region by a first multi-layered dielectric pattern having a first thickness, and a second nonvolatile memory cell having a second gate pattern therein, which is separated from the vertical active region by a second multi-layered dielectric pattern having a second thickness. The second gate pattern is also separated from the first gate pattern by a distance less than a sum of the first and second thicknesses.


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