The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2015
Filed:
Jul. 04, 2013
Applicants:
Naman Gupta, Delhi, IN;
Amol Agarwal, New Delhi, IN;
Gaurav Goyal, Dehradun, IN;
Inventors:
Assignee:
Freescale Semiconductor, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 23/00 (2006.01); H03K 23/40 (2006.01); H03K 21/12 (2006.01); H03K 21/38 (2006.01); H03K 23/58 (2006.01);
U.S. Cl.
CPC ...
H03K 23/40 (2013.01); H03K 21/12 (2013.01); H03K 21/38 (2013.01); H03K 23/58 (2013.01);
Abstract
An n-bit counter is formed from cascading counter sub-modules. The counter includes combinatorial control logic coupled to a lower order counter sub-module. The control logic is arranged to clock gate at least one higher order counter sub-module dependent on a logical combination of outputs of the lower order counter sub-module and where the control logic uses pipelining to store at least one previous control logic output for use in determining a later control logic output.