The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2015

Filed:

Dec. 15, 2011
Applicants:

Robert Haig, Austin, TX (US);

Patrick Chuang, Cupertino, CA (US);

Chih Tseng, Fremont, CA (US);

Mu-hsiang Huang, San Jose, CA (US);

Inventors:

Robert Haig, Austin, TX (US);

Patrick Chuang, Cupertino, CA (US);

Chih Tseng, Fremont, CA (US);

Mu-Hsiang Huang, San Jose, CA (US);

Assignee:

GSI Technology, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 7/18 (2006.01); G11C 7/10 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1072 (2013.01); G11C 7/1039 (2013.01); G11C 11/419 (2013.01); G11C 2207/2281 (2013.01); G11C 2207/229 (2013.01);
Abstract

Systems and methods are disclosed for increasing the performance of static random access memory (SRAM). Various systems herein, for example, may include or involve dual- or multi-pipe, multi-bank SRAMs, such as Quad-B2 SRAMs. In one illustrative implementation, there is provided an SRAM memory device including a memory array comprising a plurality of SRAM banks and pairs of separate and distinct pipes associated with each of the SRAM banks, wherein each pair of pipes may provide independent access to its associated SRAM bank.


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