Semiconductor memory device including data transfer bus and data transfer method of the device

Abstract

According to one embodiment, a semiconductor memory device includes a memory cell array, a data bus, a transfer controller, column blocks, and a column selector. The data bus is divided into stages. The transfer controller serially transfers data such that the data are respectively allocated to the stages. The column blocks temporarily stores the data. The column selector selects a column block for each of the stages from the column blocks, and transfers the data parallel between the stages and the column blocks selected for the stages. The data bus extends from one end to the other in a direction in which the column blocks are arranged, and returns from the other end to the one end.