The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2015
Filed:
Jan. 25, 2013
Amaury Gendron, San Jose, CA (US);
Chai Ean Gill, Chandler, AZ (US);
Vadim A. Kushner, Palos Verdes Estates, CA (US);
Rouying Zhan, Gilbert, AZ (US);
Amaury Gendron, San Jose, CA (US);
Chai Ean Gill, Chandler, AZ (US);
Vadim A. Kushner, Palos Verdes Estates, CA (US);
Rouying Zhan, Gilbert, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
An area-efficient, high voltage, single polarity ESD protection device () is provided which includes an p-type substrate (); a first p-well (-) formed in the substrate and sized to contain n+ and p+ contact regions () that are connected to a cathode terminal; a second, separate p-well (-) formed in the substrate and sized to contain only a p+ contact region () that is connected to an anode terminal; and an electrically floating n-type isolation structure (-) formed in the substrate to surround and separate the first and second semiconductor regions. When a positive voltage exceeding a triggering voltage level is applied to the cathode and anode terminals, the ESD protection device triggers an inherent thyristor into a snap-back mode to provide a low impedance path through the structure for discharging the ESD current.