The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2015

Filed:

Oct. 02, 2012
Applicants:

Furukawa Electric Co., Ltd., Tokyo, JP;

Furukawa Automotive Systems Inc., Shiga, JP;

Inventors:

Nobutake Orime, Tokyo, JP;

Daisuke Inoue, Tokyo, JP;

Naotaka Uchino, Tokyo, JP;

Yoichi Iso, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01Q 1/38 (2006.01); G01S 7/03 (2006.01); H01Q 1/52 (2006.01); H01Q 15/00 (2006.01); H01Q 21/06 (2006.01);
U.S. Cl.
CPC ...
G01S 7/032 (2013.01); H01Q 1/521 (2013.01); H01Q 15/006 (2013.01); H01Q 21/06 (2013.01);
Abstract

Provided is a built-in transmitting and receiving integrated radar antenna whose coverage of a horizontal radiation pattern is widened and whose space factor is improved by integrating high-frequency circuit component onto an antenna substrate while suppressing unnecessary waves. A first dielectric substrate () is formed into a three-layered structure in which a bias line () of an MIC is disposed between a second layer () and a third layer () and a second ground plane () is disposed between the first layer () and the second layer (). Also, the second ground plane () is conductively connected with isolated through-holes (), so that a domain in which a feeding port () is disposed is isolated from a domain (B) in which the bias line () is disposed.


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