The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2015

Filed:

Feb. 28, 2012
Applicants:

Allan T. Mitchell, Heath, TX (US);

Imran Mahmood Khan, Richardson, TX (US);

Michael A. Wu, Audubon, PA (US);

Inventors:

Allan T. Mitchell, Heath, TX (US);

Imran Mahmood Khan, Richardson, TX (US);

Michael A. Wu, Audubon, PA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/10 (2006.01); H01L 23/522 (2006.01); H01L 27/115 (2006.01); H01L 49/02 (2006.01); H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66825 (2013.01); H01L 23/5223 (2013.01); H01L 27/1156 (2013.01); H01L 28/40 (2013.01); H01L 27/11517 (2013.01); H01L 29/94 (2013.01); H01L 28/60 (2013.01); H01L 21/2652 (2013.01); H01L 29/105 (2013.01);
Abstract

An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, doped n-type throughout its length, and includes portions serving as gate electrodes of n-channel and p-channel MOS transistors; a plate of a metal-to-poly storage capacitor; and a plate of poly-to-active tunneling capacitors. The p-channel MOS transistor includes a buried channel region, formed by way of ion implantation, disposed between its source and drain regions. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.


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