The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2015

Filed:

Apr. 15, 2013
Applicant:

Advanced Optoelectronic Technology, Inc., Hsinchu Hsien, TW;

Inventors:

Chia-Hui Shen, Hsinchu, TW;

Tzu-Chien Hung, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 33/62 (2010.01); H01L 33/58 (2010.01); H01L 33/20 (2010.01); H01L 33/38 (2010.01); H01L 33/54 (2010.01);
U.S. Cl.
CPC ...
H01L 33/62 (2013.01); H01L 33/58 (2013.01); H01L 33/20 (2013.01); H01L 33/38 (2013.01); H01L 33/54 (2013.01); H01L 2924/0002 (2013.01);
Abstract

An LED die comprises a substrate and an epitaxial layer formed thereon. The epitaxial layer comprises a first n-type semiconductor layer, an active layer and a p-type semiconductor layer grown on the substrate in sequence. The LED die defines a receiving recess formed in a center of a top face of the p-type semiconductor layer. The receiving recess extends through the p-type semiconductor layer, the active layer and into the n-type semiconductor layer along a top-to-bottom direction of the epitaxial layer. A pair of p-pads are located at two opposite sides of the p-type semiconductor layer, respectively. A first n-pad is received in the receiving recess and located on the n-type layer.


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