The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2015

Filed:

Jun. 01, 2012
Applicants:

Thomas A. Hertel, Santa Clarita, CA (US);

Erich H. Soendker, Granada Hills, CA (US);

Horacio Saldivar, Canoga Park, CA (US);

Inventors:

Thomas A. Hertel, Santa Clarita, CA (US);

Erich H. Soendker, Granada Hills, CA (US);

Horacio Saldivar, Canoga Park, CA (US);

Assignee:

Aerojet Rocketdyne of DE, Inc., Canoga Park, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/46 (2006.01); H05K 1/03 (2006.01); H01L 23/498 (2006.01); H01L 23/552 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/552 (2013.01); H01L 23/66 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A multi-layer substrate includes a ground structure, a plurality of dielectric layers on the ground structure and a plurality of conductive layers separating the plurality of dielectric layers. The conductive layers include a first conductive layer and a second conductive layer and a connection electrically coupling the first conductive layer and the second conductive layer. The first conductive layer and the ground structure are configured to define a first parasitic capacitance there between and the first conductive layer and the second conductive layer are configured to define a second, negating parasitic capacitance there between.


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